更新README

This commit is contained in:
ZXCLI 2026-06-12 16:22:17 +08:00
parent 205daf0cab
commit c0c195331c
693 changed files with 243421 additions and 1 deletions

12
28379d_P_SFRA/.ccsproject Normal file
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<?xml version="1.0" encoding="UTF-8" ?>
<?ccsproject version="1.0"?>
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<ccsVariant value="50:Theia-based"/>
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<deviceFamily value="C2000"/>
<executableActions value=""/>
<createSlaveProjects value=""/>
<templateProperties value="id=empty_driverlib_project.projectspec.empty_driverlib_project"/>
<origin value="C:\ti\C2000Ware_6_00_01_00\driverlib\f2837xd\examples\cpu1\empty_projects\CCS\empty_driverlib_project.projectspec"/>
<filesToOpen value=""/>
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8
28379d_P_SFRA/.clangd Normal file
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# This is an auto-generated file - do not add it to source-control
CompileFlags:
CompilationDatabase: CPU1_FLASH/.clangd
Diagnostics:
Suppress: '*'

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28379d_P_SFRA/.cproject Normal file
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<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.SEARCH_PATH.1975339621" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.SEARCH_PATH" valueType="libPaths">
<listOptionValue value="${COM_TI_C2000WARE_LIBRARY_PATH}"/>
<listOptionValue value="${CG_TOOL_ROOT}/lib"/>
<listOptionValue value="${CG_TOOL_ROOT}/include"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP.1681771518" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP" value="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DIAG_WRAP.off" valueType="enumerated"/>
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DISPLAY_ERROR_NUMBER.412065563" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.DISPLAY_ERROR_NUMBER" value="true" valueType="boolean"/>
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.XML_LINK_INFO.691898748" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.XML_LINK_INFO" value="${ProjName}_linkInfo.xml" valueType="string"/>
<option id="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.ENTRY_POINT.1075533771" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.linkerID.ENTRY_POINT" value="code_start" valueType="string"/>
</tool>
<tool id="com.ti.ccstudio.buildDefinitions.C2000_25.11.hex.2013722521" name="C2000 Hex Utility" superClass="com.ti.ccstudio.buildDefinitions.C2000_25.11.hex"/>
<tool id="com.ti.ccstudio.buildDefinitions.sysConfig.482075593" name="SysConfig" superClass="com.ti.ccstudio.buildDefinitions.sysConfig">
<option id="com.ti.ccstudio.buildDefinitions.sysConfig.PRODUCTS.1127766793" superClass="com.ti.ccstudio.buildDefinitions.sysConfig.PRODUCTS" valueType="stringList">
<listOptionValue value="${COM_TI_C2000WARE_SYSCONFIG_MANIFEST}"/>
<listOptionValue value="${C2000WARE_ROOT}/.metadata/sdk.json"/>
</option>
<option id="com.ti.ccstudio.buildDefinitions.sysConfig.DEVICE.1986274984" superClass="com.ti.ccstudio.buildDefinitions.sysConfig.DEVICE" value="F2837xD" valueType="string"/>
<option id="com.ti.ccstudio.buildDefinitions.sysConfig.PACKAGE.775645545" superClass="com.ti.ccstudio.buildDefinitions.sysConfig.PACKAGE" value="F2837xD_176PTP" valueType="string"/>
<option id="com.ti.ccstudio.buildDefinitions.sysConfig.PART.1361857783" superClass="com.ti.ccstudio.buildDefinitions.sysConfig.PART" value="F2837xD_176PTP" valueType="string"/>
<option id="com.ti.ccstudio.buildDefinitions.sysConfig.CONTEXT.643773814" superClass="com.ti.ccstudio.buildDefinitions.sysConfig.CONTEXT" value="CPU1" valueType="string"/>
</tool>
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="device/driverlib|2837xD_RAM_lnk_cpu1.cmd" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
</storageModule>
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration>
</storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
<project id="empty_driverlib_project.com.ti.ccstudio.buildDefinitions.C2000.ProjectType.69615276" name="C2000" projectType="com.ti.ccstudio.buildDefinitions.C2000.ProjectType"/>
</storageModule>
</cproject>

37
28379d_P_SFRA/.project Normal file
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@ -0,0 +1,37 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>28379d_P_SFRA</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.ti.ccstudio.core.ccsNature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
</natures>
<linkedResources>
<link>
<name>driverlib.lib</name>
<type>1</type>
<locationURI>COM_TI_C2000WARE_INSTALL_DIR/driverlib/f2837xd/driverlib/ccs/Debug/driverlib.lib</locationURI>
</link>
</linkedResources>
<variableList>
<variable>
<name>C2000WARE_DLIB_ROOT</name>
<value>$%7BCOM_TI_C2000WARE_INSTALL_DIR%7D/driverlib/f2837xd/driverlib</value>
</variable>
<variable>
<name>C2000WARE_ROOT</name>
<value>$%7BCOM_TI_C2000WARE_INSTALL_DIR%7D</value>
</variable>
</variableList>
</projectDescription>

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@ -0,0 +1,3 @@
eclipse.preferences.version=1
inEditor=false
onBuild=false

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@ -0,0 +1,15 @@
eclipse.preferences.version=1
encoding//CPU1_FLASH/LIBSFAR/subdir_rules.mk=UTF-8
encoding//CPU1_FLASH/LIBSFAR/subdir_vars.mk=UTF-8
encoding//CPU1_FLASH/LIBSFRA/subdir_rules.mk=UTF-8
encoding//CPU1_FLASH/LIBSFRA/subdir_vars.mk=UTF-8
encoding//CPU1_FLASH/SFRA/subdir_rules.mk=UTF-8
encoding//CPU1_FLASH/SFRA/subdir_vars.mk=UTF-8
encoding//CPU1_FLASH/device/subdir_rules.mk=UTF-8
encoding//CPU1_FLASH/device/subdir_vars.mk=UTF-8
encoding//CPU1_FLASH/makefile=UTF-8
encoding//CPU1_FLASH/objects.mk=UTF-8
encoding//CPU1_FLASH/sources.mk=UTF-8
encoding//CPU1_FLASH/subdir_rules.mk=UTF-8
encoding//CPU1_FLASH/subdir_vars.mk=UTF-8
encoding/<project>=UTF-8

View File

@ -0,0 +1,71 @@
{
"version": "0.2.0",
"configurations": [
{
"name": "28379d",
"type": "ccs-debug",
"request": "launch",
"projectInfo": {
"name": "28379d",
"resourceId": "/28379d"
},
"connections": [
{
"name": "Texas Instruments XDS100v2 USB Debug Probe_0",
"cores": [
{
"name": "C28xx_CPU1",
"debuggerSettings": {
"data": "<?xml version=\"1.0\" encoding=\"UTF-8\" standalone=\"no\" ?>\n<PropertyValues/>\n"
}
}
]
}
]
},
{
"name": "28379d_PP_SFRA",
"type": "ccs-debug",
"request": "launch",
"projectInfo": {
"name": "28379d_PP_SFRA",
"resourceId": "/28379d_PP_SFRA"
},
"connections": [
{
"name": "Texas Instruments XDS100v2 USB Debug Probe_0",
"cores": [
{
"name": "C28xx_CPU1",
"debuggerSettings": {
"data": "<?xml version=\"1.0\" encoding=\"UTF-8\" standalone=\"no\" ?>\n<PropertyValues/>\n"
}
}
]
}
]
},
{
"name": "28379d_P_SFRA",
"type": "ccs-debug",
"request": "launch",
"projectInfo": {
"name": "28379d_P_SFRA",
"resourceId": "/28379d_P_SFRA"
},
"connections": [
{
"name": "Texas Instruments XDS100v2 USB Debug Probe_0",
"cores": [
{
"name": "C28xx_CPU1",
"debuggerSettings": {
"data": "<?xml version=\"1.0\" encoding=\"UTF-8\" standalone=\"no\" ?>\n<PropertyValues/>\n"
}
}
]
}
]
}
]
}

View File

@ -0,0 +1,182 @@
MEMORY
{
PAGE 0 : /* Program Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
/* BEGIN is used for the "boot to Flash" bootloader mode */
BEGIN : origin = 0x080000, length = 0x000002
RAMM0 : origin = 0x000123, length = 0x0002DD
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS15 : origin = 0x01B000, length = 0x000FF8 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
// RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
// FLASHN_RSVD : origin = 0x0BFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
PAGE 1 : /* Data Memory */
/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
BOOT_RSVD : origin = 0x000002, length = 0x000121 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x000FF8 /* Uncomment for F28374D, F28376D devices */
// RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMGS11 : origin = 0x017000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
}
SECTIONS
{
/* Allocate program areas: */
// .cinit : > FLASHB PAGE = 0, ALIGN(8)
.cinit : > FLASHC PAGE = 0, ALIGN(8) // 原为 FLASHB改为 FLASHC
.text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(8)
codestart : > BEGIN PAGE = 0, ALIGN(8)
/* Allocate uninitalized data sections: */
.stack : > RAMM1 PAGE = 1
.switch : > FLASHB PAGE = 0, ALIGN(8)
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
#if defined(__TI_EABI__)
.init_array : > FLASHB, PAGE = 0, ALIGN(8)
// .bss : > RAMLS5, PAGE = 1
// 修改 .bss 为多个 RAM 区域,扩大容量
.bss : > RAMLS5 | RAMGS0 | RAMGS1, PAGE = 1
.bss:output : > RAMLS3, PAGE = 0
.bss:cio : > RAMLS5, PAGE = 1
.data : > RAMLS5, PAGE = 1
.sysmem : > RAMLS5, PAGE = 1
/* Initalized sections go in Flash */
.const : > FLASHF, PAGE = 0, ALIGN(8)
#else
.pinit : > FLASHB, PAGE = 0, ALIGN(8)
.ebss : >> RAMLS5 | RAMGS0 | RAMGS1, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
.cio : > RAMLS5, PAGE = 1
/* Initalized sections go in Flash */
.econst : >> FLASHF PAGE = 0, ALIGN(8)
#endif
// 添加 SFRA 库需要的段
// SFRA_F32_Data : > RAMGS0, PAGE = 1
Filter_RegsFile : > RAMGS0, PAGE = 1
SHARERAMGS0 : > RAMGS0, PAGE = 1
SHARERAMGS1 : > RAMGS1, PAGE = 1
SHARERAMGS2 : > RAMGS2, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
#if defined(__TI_EABI__)
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0,
LOAD_START(RamfuncsLoadStart),
LOAD_SIZE(RamfuncsLoadSize),
LOAD_END(RamfuncsLoadEnd),
RUN_START(RamfuncsRunStart),
RUN_SIZE(RamfuncsRunSize),
RUN_END(RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#else
.TI.ramfunc : {} LOAD = FLASHD,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#endif
#else
ramfuncs : LOAD = FLASHD,
RUN = RAMLS0,
LOAD_START(_RamfuncsLoadStart),
LOAD_SIZE(_RamfuncsLoadSize),
LOAD_END(_RamfuncsLoadEnd),
RUN_START(_RamfuncsRunStart),
RUN_SIZE(_RamfuncsRunSize),
RUN_END(_RamfuncsRunEnd),
PAGE = 0, ALIGN(8)
#endif
#endif
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}
/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/

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@ -0,0 +1,141 @@
MEMORY
{
PAGE 0 :
/* BEGIN is used for the "boot to SARAM" bootloader mode */
BEGIN : origin = 0x000000, length = 0x000002
RAMM0 : origin = 0x000123, length = 0x0002DD
RAMD0 : origin = 0x00B000, length = 0x000800
RAMLS0 : origin = 0x008000, length = 0x000800
RAMLS1 : origin = 0x008800, length = 0x000800
RAMLS2 : origin = 0x009000, length = 0x000800
RAMLS3 : origin = 0x009800, length = 0x000800
RAMLS4 : origin = 0x00A000, length = 0x000800
RESET : origin = 0x3FFFC0, length = 0x000002
/* Flash sectors */
FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
FLASHN : origin = 0x0BE000, length = 0x001FF0 /* on-chip Flash */
// FLASHN_RSVD : origin = 0x0BFFF0, length = 0x000010 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
PAGE 1 :
BOOT_RSVD : origin = 0x000002, length = 0x000121 /* Part of M0, BOOT rom will use this for stack */
RAMM1 : origin = 0x000400, length = 0x0003F8 /* on-chip RAM block M1 */
// RAMM1_RSVD : origin = 0x0007F8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMD1 : origin = 0x00B800, length = 0x000800
RAMLS5 : origin = 0x00A800, length = 0x000800
RAMGS0 : origin = 0x00C000, length = 0x001000
RAMGS1 : origin = 0x00D000, length = 0x001000
RAMGS2 : origin = 0x00E000, length = 0x001000
RAMGS3 : origin = 0x00F000, length = 0x001000
RAMGS4 : origin = 0x010000, length = 0x001000
RAMGS5 : origin = 0x011000, length = 0x001000
RAMGS6 : origin = 0x012000, length = 0x001000
RAMGS7 : origin = 0x013000, length = 0x001000
RAMGS8 : origin = 0x014000, length = 0x001000
RAMGS9 : origin = 0x015000, length = 0x001000
RAMGS10 : origin = 0x016000, length = 0x001000
// RAMGS11 : origin = 0x017000, length = 0x000FF8 /* Uncomment for F28374D, F28376D devices */
// RAMGS11_RSVD : origin = 0x017FF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
RAMGS11 : origin = 0x017000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS12 : origin = 0x018000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS13 : origin = 0x019000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS14 : origin = 0x01A000, length = 0x001000 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
RAMGS15 : origin = 0x01B000, length = 0x000FF8 /* Only Available on F28379D, F28377D, F28375D devices. Remove line on other devices. */
// RAMGS15_RSVD : origin = 0x01BFF8, length = 0x000008 /* Reserve and do not use for code as per the errata advisory "Memory: Prefetching Beyond Valid Memory" */
/* Only on F28379D, F28377D, F28375D devices. Remove line on other devices. */
CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
CANA_MSG_RAM : origin = 0x049000, length = 0x000800
CANB_MSG_RAM : origin = 0x04B000, length = 0x000800
}
SECTIONS
{
codestart : > BEGIN, PAGE = 0
.text : >> RAMD0 | RAMLS0 | RAMLS1 | RAMLS2 | RAMLS3 | RAMLS4, PAGE = 0
.cinit : > RAMM0, PAGE = 0
.switch : > RAMM0, PAGE = 0
.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
.stack : > RAMM1, PAGE = 1
#if defined(__TI_EABI__)
.bss : > RAMLS5, PAGE = 1
.bss:output : > RAMLS3, PAGE = 0
.init_array : > RAMM0, PAGE = 0
.const : > RAMLS5, PAGE = 1
.data : > RAMLS5, PAGE = 1
.sysmem : > RAMLS5, PAGE = 1
#else
.pinit : > RAMM0, PAGE = 0
.ebss : > RAMLS5, PAGE = 1
.econst : > RAMLS5, PAGE = 1
.esysmem : > RAMLS5, PAGE = 1
#endif
Filter_RegsFile : > RAMGS0, PAGE = 1
ramgs0 : > RAMGS0, PAGE = 1
ramgs1 : > RAMGS1, PAGE = 1
#ifdef __TI_COMPILER_VERSION__
#if __TI_COMPILER_VERSION__ >= 15009000
.TI.ramfunc : {} > RAMM0, PAGE = 0
#else
ramfuncs : > RAMM0 PAGE = 0
#endif
#endif
/* The following section definitions are required when using the IPC API Drivers */
GROUP : > CPU1TOCPU2RAM, PAGE = 1
{
PUTBUFFER
PUTWRITEIDX
GETREADIDX
}
GROUP : > CPU2TOCPU1RAM, PAGE = 1
{
GETBUFFER : TYPE = DSECT
GETWRITEIDX : TYPE = DSECT
PUTREADIDX : TYPE = DSECT
}
/* The following section definition are for SDFM examples */
Filter1_RegsFile : > RAMGS1, PAGE = 1, fill=0x1111
Filter2_RegsFile : > RAMGS2, PAGE = 1, fill=0x2222
Filter3_RegsFile : > RAMGS3, PAGE = 1, fill=0x3333
Filter4_RegsFile : > RAMGS4, PAGE = 1, fill=0x4444
Difference_RegsFile : >RAMGS5, PAGE = 1, fill=0x3333
}
/*
//===========================================================================
// End of file.
//===========================================================================
*/

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